François Cerisier, Manager TVS France2014-04-22T13:14:12+00:00

francois-cerisier-webFrançois Cerisier has an Engineering Diploma in Digital Signal Processing from Polytech’Sophia, University of Nice-Sophia-Antipolis and over 12 years of experience in verification of IPs, CPUs and System-On-Chips and in hardware/software co-verification. François gained verification methodology expertise from industrial projects of major semiconductor companies (including Infineon, Broadcom, ST-Microelectronics, ST-Ericsson) and EDA startups. François is also lecturer at Polytech’Sophia where he teaches Design Verification to undergraduate students.

Additional to verification expertise, François has track records of verification project leads, verification team management, trainings and design house project setup.

E-Mail:  [email protected]