ASIC Verification Engineer – USA2018-02-26T09:16:34+00:00

Job Location: Mountain View, CA

Job Type: Contract / Full Time

Experience required:  5 to 10+ years

 

Skills Required:

  • Minimum 5+ years experience required in ASIC Verification
  • Verilog and C/C++ coding a must
  • Makefiles, Perl scripting a must
  • Chip/full system level ASIC Verification skills, and debug skills a must
  • Debug using waveforms a must, Verdi source level debug a plus
  • Board level debug with logic analyzers, scopes desirable
  • Experience working with X 64 architecture a great plus
  • Experience working with PCI-Express a plus
  • System level knowledge a must
  • System is defined as a test bench containing (CPU + GPU + multi-media engines + Southbridge) with hardware based coherency
  • System could be a simulation test bench, emulation test bench or a board
  • System level knowledge does not mean signal integrity checking, electrical checks, EMC checks, thermal checks, ATPG testing on a board
  • Tests will be written in C/C++, compiled for CPU and will be run on simulation/emulation/board unchanged
  • Block/unit level verification skills using OVM/UVM knowledge desirable (not required)

Package

  • Highly competitive to match experience and capability

How To Apply

Send your CV to [email protected]