DFT – SCAN/ATPG Engineer – JobCode: HWDIND120418_562018-04-12T13:57:29+00:00

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Job Title:

DFT – SCAN/ATPG Engineer

Job Code:

HWDIND120418_56

Job Description

  • Scan insertion
  • SCAN DRC/Coverage debug
  • ATPG Pattern generation
  • Gate level simulations (Zero delay/Timing Delay simulations)
  • Worked on JTAG/P1500 protocols
  • Perl/Tcl scripting
  • Timing/Formal verification/PD flow knowledge is plus

Experience

  • 3-5 years

Location

  • Hyderabad

Open Positions

  • 3

Package

  • Highly competitive to match experience and capability
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