Job Code: HWVIND030817_11
- Experience on EMIR analysis for multiple modes, including; static and dynamic with/without functional vectors
- To have expertise in understanding and debugging EMIR issues in a block level.
- Power analysis for the blocks.
- Experience on Floor-planning, Place & route, power and clock distribution, pin placement.
- In-depth knowledge on industry leading tools like Redhawk, Olympus/ICC2, Primetime, and Calibre
- Knowledge of package modeling, package and chip level analysis is added advantage
- Good understanding of Physical design verification using Calibre.
- Knowledge of Synthesis and DFT is added advantage.
- Prior experience with 16nm or finer geometries is a plus.
- Proficient use of tcl/Perl
- Must have good communication skills and self-driven individual.
Basic Job Deliverable:
- EMIR analysis/debug
- Block level P&R closure and sign-off.
Experience: 4 to 6 Years
- Highly competitive to match experience and capability
How To Apply: Send your CV with Job Code to [email protected]