Senior DFT Verification Engineer 2017-08-11T10:18:40+00:00

Job Code: HWVIND_06

Job Description:

The Silicon development team is looking for a senior DFT verification contractor in Xilinx India, for the verification of next generation MPSOC FPGAs.

Responsibilities include the following:

  • Work with DFT and design teams and contribute to DFT verification of next generation MPSOC FPGAs
  • Expertise in writing test benches (Verilog, system Verilog) and tests for different DFT architectures
  • Hands on verification experience with – Memory BIST, Memory Repair, SCAN, Logic BIST and Boundary SCAN
  • Verification knowledge for IJTAG, PLL, Ring-Oscillator etc would be desirable
  • Ability to independently handle complete verification of DFT architectures at Full-Chip level with minimal support
  • Good debugging skills with Gate-level Simulation both with and without timing for big designs
  • Low-power, Multi-power domain design understanding
  • Be responsible for a comprehensive verification plan and drive the implementation of verification test cases from applications and other source

Basic Job Deliverable: Test writing, debugging and test bench support for Full chip DFT architecture verification


  • Masters in Electrical or Computer Engineering
  • Strong experience in HDL, DFT verification, and general computational logic design/verification concepts
  • Expertise in Verilog/System Verilog, C/SystemVerilog, scripting languages like Perl/Python, etc.
  • Excellent written and verbal communication skills
  • Excellent interpersonal skills, self-motivated

Experience: 10+ years in functional verification

Location: Hyderabad


  • Highly competitive to match experience and capability

How To Apply: Send your CV with Job Code to [email protected]

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