Senior Verification Engineer, ASIC
- You will work with development of 5G radio base stations.
- You will work with IP block verification in digital ASIC (& FPGA) projects.
- The goal of the position is to verify that the functional requirements of the blocks are fulfilled before tape-out.
- The work will be carried out in cooperation with ASIC designers and other verification engineers.
Competence/Experience – Mandatory:
- Long experience from working with ASIC/FPGA verification
- Experience in using the System Verilog/UVM tools and methodology
- Experience from working with constrained random methodology, dedicated test-vectors and assertions
- Knowledge in programming C, C++ and/or System C
- Scripting in Perl, Python and/or TCL
- Knowledge of reference model development
Competence/Experience – Optional:
- Experience in system level verification
- Knowledge about Formal verification is a plus.
- Test bench development
- development from scratch
- Experience from working with LTE/WCDMA and/or GSM systems
- Knowledge of SW design for an embedded environment
- Experience in hardware design/systemization/design methodology
- Experience in agile ways of working
- 5+ Years
- Highly competitive to match experience and capability