SoC IP Verification – Graphics Orientation – JobCode: HWDIND220318_482018-03-22T09:37:08+00:00

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Job Title:

SoC IP Verification – Graphics Orientation

Job Code:

HWDIND220318_48

Job Description

  • Be responsible for a new functional block of the complex 3D Graphics IP cores for a combined CPU/GPU development effort (APU and dGPU). RTL and DV skills are required. Knowledge of basic 3D pipelines
  • Be part of a team of designers and verification engineers, working closely with other team members to implement and verify the functionality of a given design element within the context of the block, chip and overall system as well as to design features for the next generation in RTL.
  • Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.
  • Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC
  • Experience of working on Functional Verification, SoC Verification, Emulation
  • Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language, OVM/UVM Methodology knowledge and experience
  • Must have good communication skills and the ability to work in a team environment.
  • Preferably having experience in architecture such as x86 or ARM domain based SOCs

Experience

  • 5+ years of experience in GPU/SOC/IP Verification

Open Positions

  • 2

Qualification

  • BE/B.Tech/ME/M.TECH or equivalent ECE/EEE

Location

  • Hyderabad

Package

  • Highly competitive to match experience and capability
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