Verification Engineers 2016-05-04T07:17:11+00:00

Test and Verification Solutions (T&VS) has a world-wide reputation for delivering expert verification services to both tier 1 customers and start-ups and we are now looking to recruit multiple verification engineers to help with our expansion in the UK.

We will accept applications for both contract and permanent roles.

The successful candidates will be working at TVS client sites verifying complex designs using state-of-the-art verification techniques and tools.

Required Skills and Experience:

  • Good experience of verification on a variety of IP and SoC’s
  • Good experience in performing feature extraction on a specification and deriving a verification plan
  • Good knowledge of System Verilog and extensive experience of applying it
  • Good knowledge of UVM and extensive experience of applying it
  • Can demonstrate experience of building complete IP SV/UVM-compliant test benches from scratch
  • Can demonstrate experience of metric-based verification and coverage closure


  • You will be responsible for a performing verification under the guidance of a given verification strategy

Location and Package
This is an excellent opportunity to join a world-class verification company.  The remuneration package will reflect this.

  • Location: Bristol based, UK
  • Hours: 40-45 hours per week
  • Duration: 1-Year
  • Start: ASAP
  • Package: Highly competitive to match expertise and experience

How To Apply

  • To apply please send your CV to Mike Bartley ) stating your nationality and ability to work in the UK.
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Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
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If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
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The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
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