T&VS provides end-to-end DFT solution for Consumer SoC 2018-03-01T17:42:19+00:00

Case Studies

T&VS provides end-to-end DFT solution for Consumer SoC

Background

This project involved DFT implementation and execution of a complex Consumer SoC. T&VS’ expertise in development of DFT methodologies for complex designs and track record of  providing a wide range of DFT services from scan insertion to JTAG meant that the customer could rely on T&VS to independently manage the DFT activities for their SoC.

T&VS was tasked with scan implementation, verification and pattern delivery for the design which had a flop count of around 1.5 million. Memory BIST (MBIST) also had to be performed for 400+ memory instances. The stuck at and at-speed coverage analysis targets were set at 99% and 85% respectively.

The T&VS Solution

T&VS implemented a balanced compression ratio scan hybrid coded to generate optimum pattern count. MBIST generation and verification was performed on standalone test benches where different modes like diagnosis, hard repair, soft repair and BIST were verified before plug-in into the SoC.

The T&VS approach enabled the customer to meet the stuck-at and at-speed coverage targets. T&VS was also able to provide assistance to develop test mode constraints for Static Timing Analysis (STA). T&VS automated the scan insertion and pattern generation process to provide quick turnaround for net list updates due to ECO.

Benefits of T&VS Solutions

  • All DFT expertise under single roof to assist STA constraints(TEST modes)till tester assistance.
  • Re-usable automation scripts for scan insertion used pattern generation.
  • Reduction in overall development costs.
Get in Touch

Find Out More

Contact one of our consultants today to discuss your requirements.
No hard sales, just pertinent questions to understand your needs and to discuss how we may be able to help.

Alternatively contact one of our Local Sales Offices.

Get in Touch
T&VS NEWSLETTER SIGN-UP
The T&VS newsletters inform you about industry news, events and information from T&VS. No spam, we promise and it is always easy to unsubscribe.
We never share your information. Read our Privacy Statement
Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
Bootcamp Enquiry Form
If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
FREE SystemC UVM Library Now Available
The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
Have your product requirements been successfully tested and implemented?
Find out how asureSIGN can help you implement a successful Requirements Driven Verification and Test Strategy by visiting asureSIGN or enter your details and we will be in touch.
Course Dates and Pricing
To receive additional information, including course dates and pricing, please contact our training team who will be happy to help.
Download Request
Please complete the following form then click 'submit' to access the download.
Presentation Request
Please complete the following form then click 'submit' to gain access to the presentations.
DOWNLOAD REQUEST
Please complete the following form and then click 'submit' to gain access to the download.
FREE QA ASSESSMENTS
Did you get what you were looking?

Let the testing experts help. We will run a FREE QA assessment which will include our top 5 recommendations to help maximise your testing.