Open Source Tools for Verification
Wilson Snyder (Veripool) – Verilator: Open Simulation – Growing Up
Dag Braend (Atmel) – Atmel and the use of Verilator to create uC Device Models
Maksim Jenihhin (Tallinn University of Technology, Estonia) – Zambia CAD: Shall we dance?
Richard Porter (Indepndent) – Open Source Tools for Verification