Bharath MP, Test and Verification Solutions 2014-12-26T07:41:38+00:00
Speaker: Bharath MP, Verification Engineer
Organisation: Test and Verification Solutions
Presentation Title: Advantages of SCEMI based BFMs
Abstract SCE-MI transactors for protocols and interfaces like USB, PCIe and Ethernet can reduce verification turnaround times drastically. Incorporating SCE-MI transactors into the verification environment has many benefits.
This paper explores how Verification teams can achieve milestones with a SCE-MI based environment.
Biography Bharat MP has been working with T&VS for the past 2.5 years. He has worked on verification of high speed interface blocks and flash controller IP verification. Bharat has also been involved in VIP development projects and has built an entire APB VIP from scratch.Bharat has also worked on techniques to optimize co-simulation between OSCII and HDL simulators and has successfully developed a technique to integrate a SystemC TLM 2.0 model running in an OSCII simulator with a System Verilog testbench running in an HDL simulator.
Presentation:
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