Rui Wang, Atrenta 2014-12-26T07:50:13+00:00
Speaker: Rui Wang, Lead Product Engineer
Organisation: Atrenta
Presentation Title: Speed up Emulation debugging using white-box assertions
Abstract Debugging SoC errors on emulation/accelerator hardware can be painful and frustrating. ABV(Assertion Based Verification) methods consisting of commercial VIP and manually written assertions can provide some help, but fall short of solving the fundamental emulation problem: limited at-speed debug, running at multi-MHz speeds, narrow trace window. And the time between bug and failure can span billions of cycles.  In this presentation I will introduce how automated emulation-compatible white-box SVA assertion generation can eliminate emulation debug limitations – reducing debug time from weeks to hours – and automatically detect corner-case bugs at their source.
Biography Rui Wang, PHD., has 8+ years experience in design and verification area.
In 1998~2008, Rui Wang is the assistant research in VLSI institute of Hefei university of technology;
In 2008~2013, Rui Wang is the Staff design&verification engineer in AMD shanghai R&D centre focusing on low power design&verification of GPU, APU, Game console products;
In 2013 till now, Rui Wang is the Lead product engineer /FAE supporting bugscope product in Atrenta Inc;
Rui wang’s interesting area include: verification methodology, low power design and verification, Verification infrastructure
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