Gaurav Jain, Freescale Semiconductor Pvt Ltd 2015-01-06T11:08:00+00:00

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Name: Gaurav Jain
Designation: Staff Design Engineer
Title: Assertions: A Smart Path to Low Power Verification of Complex SoCs

Abstract:  Low Power SoC designs implementing multiple low power design techniques like fine grained clock gating, power shut off involving multiple low power domains, body or well biasing, dynamic frequency and voltage scaling, significantly increases the scope and target areas for SoC Verification. The dynamic simulation driven verification approach is cycle time and debug effort intensive, when it comes to catching low power integration and design issues. Assertions targeted towards low power verification can provide a smart path to reduce cycle time and to help in catching issues early in verification by clearly highlighting type and source of the issue. The assertions can provide useful coverage information along with system level cross coverage on key signals to measure verification completeness. They can also be re-used by other projects by creating template properties. This paper presents a case study on deployment of System Verilog Low power assertions along with CPF enabled dynamic simulations to verify a Next Generation Low Power SoC. Multiple assertions categories were deployed to target verification of low power design features, Integration of Macro models, sequencing and connectivity of critical control signals and to prove the clocking and reset schemes in each device mode. We found several low power design issues related to connectivity, protocol sequence and functional behaviour of control signals like power down signals. The Assertion based verification approach gave a great ROI with savings on cycle and debug time which helped in robust and timely verification of low power intent of our SoC with high confidence.

 

Biography:  Gaurav Jain is Staff Design Engineer at Freescale Semiconductors, India.  He has nine years of experience and expertise in SoC& IP Verification, Low Power Verification and Pre-Silicon Validation domains.  Gaurav has experience on Industry standard protocols like AMBA AHB, AXI, MIPI, ENET and DDR.  Gaurav holds a bachelor’s degree in Electronics Engineering from IIT-BHU, Varanasi, India.

 

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