Sudhakar Surendran, Texas Instruments 2015-01-06T14:22:17+00:00


Name:Sudhakar Surendran
Designation:Technical Lead
Title:Formal Verification:  As I know it

Abstract:  Formal Verification (FV) is one of the important tools in the Design Verification (DV) engg. arsenal. When used effectively it can help the DV engg. to improve quality and productivity. In this talk I will share my experiences and learning’s on FV usage. Specifically, I will touch upon how I got started, areas I have found FV to be effective, some real world examples and finally how FV is going to be used in future.


Biography:  Sudhakar is a Technical lead in MCU division at Texas Instruments, currently focusing on Analog integration. He has earlier worked on IP verification, SoC verification, Emulation, Prototyping, Silicon Validation and Leading teams. He has six publications and three patents on verification and micro-architecture. He holds MSc degree from IISc, Bangalore and BE from PSG College of Technology, Coimbatore.


View the Presentation Materials:

The T&VS newsletters inform you about industry news, events and information from T&VS. No spam, we promise and it is always easy to unsubscribe.
We never share your information. Read our Privacy Statement
Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
Bootcamp Enquiry Form
If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
FREE SystemC UVM Library Now Available
The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
Have your product requirements been successfully tested and implemented?
Find out how asureSIGN can help you implement a successful Requirements Driven Verification and Test Strategy by visiting asureSIGN or enter your details and we will be in touch.
Course Dates and Pricing
To receive additional information, including course dates and pricing, please contact our training team who will be happy to help.
Download Request
Please complete the following form then click 'submit' to access the download.
Presentation Request
Please complete the following form then click 'submit' to gain access to the presentations.
Please complete the following form and then click 'submit' to gain access to the download.
Did you get what you were looking?

Let the testing experts help. We will run a FREE QA assessment which will include our top 5 recommendations to help maximise your testing.