System-Level Coverage Closure with Graph-Based Portable Stimulus2015-12-03T07:01:13+00:00
Conference:DVClub Europe – December 2015 (click here to see full programme)
Speaker:Tom Anderson (Vice President of Marketing)
Organisation:Breker Verification Systems
Presentation Title:System-Level Coverage Closure with Graph-Based Portable Stimulus
Abstract:Coverage metrics are a key for effective chip verification, but many types of coverage tend to focus on the implementation rather than the verification intent. This talk introduces system-level coverage metrics that are captured by the graph-based scenario models used to drive a portable stimulus solution. In addition to the higher level of abstraction provided by system-level coverage, the nature of a graph means that all paths can be analysed and closure is guaranteed for all coverage defined by the graph. It is possible to automatically generate a set of test cases that hit all system-level coverage metrics, including complete exercise of all corner cases in standard protocols. System-level coverage results can be exported as SystemVerilog coverage so that it can be merged with other metrics.

  • Multiple forms of coverage metrics are required
  • Graph-based scenario models are very effective at capturing system-level coverage metrics representing verification intent
  • Graphs enable fully automated system-level coverage closure
Speaker Bio:Tom Anderson is Vice President of Marketing at Breker Verification Systems and Secretary of Accellera’s Portable Stimulus Working Group. He has more than 15 years of experience in EDA verification applications and marketing. Tom has served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical Marketing Director in the Verification Group at Synopsys, Vice President of Applications Engineering at 0-In Design Automation, and Vice President of Engineering at IP pioneer Virtual Chips. He holds a BS in Computer Systems Engineering from the University of Massachusetts at Amherst and an MS in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology (MIT).

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