Methodologies For Rigorous Safety Verification 2017-10-23T13:52:10+00:00

DVClub Europe Meeting – November 2017

Methodologies for Rigorous Safety Verification

Title:

How Formal Reduces Fault Analysis for ISO 26262 Safety Verification

Speaker: Bryan Ramierz, Design & Verification Product Marketing Manager, Mentor a Siemens Business
Conference: DVCLUB Europe: 28 November 2017
Abstract: The ISO 26262 standard defines straightforward metrics for evaluating the “safeness” of a design by defining safety goals, safety mechanisms, and fault metrics. However, determining those metrics is difficult because evaluating every possible fault is impractical on the size of today’s designs.

Formal verification tools have an advantage over other approaches because formal tools have the unique ability to trace cones of influence and eliminate large numbers of irrelevant faults in a process known as fault pruning. With a significantly reduced fault list, fault analysis can be performed exhaustively with formal techniques like sequential logic equivalency checking (SLEC), or coupled together with fault simulation and emulation for checking software based safety mechanisms. Formal tools provide unique capabilities that are essential for any automotive functional safety flow.

  • Formal tools have the unique ability to trace cones of influence and eliminate large numbers of irrelevant faults in a process known as fault pruning.
  • Significantly reduced fault list, fault analysis can be performed exhaustively with formal techniques
  • Formal tools provide unique capabilities that are essential for any automotive functional safety flow
Speaker Bio: Bryan Ramirez is the Product Manager for Strategic Markets at Mentor, A Siemens Business, focusing on helping customers evolve their verification practices. Bryan joined Mentor in February 2015 and his role at Mentor builds upon his 15+ years of experience working with FPGAs and advanced verification. Bryan spent 12 years at Xilinx as a verification lead and engineering manager doing IP development for advanced protocols like PCIe, Serial RapidIO and memory controllers. Following Xilinx, Bryan was Director of Engineering at a startup building FPGA based big data devices. Finally, just prior to joining Mentor, Bryan was a Senior Engineering Manager at Seagate doing SOC development for SSD controllers.
Register for FREE

Event Organiser

Sponsors

DVCLUB Europe is made possible through the generosity of our sponsors.

T&VS NEWSLETTER SIGN-UP
The T&VS newsletters inform you about industry news, events and information from T&VS. No spam, we promise and it is always easy to unsubscribe.
We never share your information. Read our Privacy Statement
Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
Bootcamp Enquiry Form
If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
FREE SystemC UVM Library Now Available
The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
Have your product requirements been successfully tested and implemented?
Find out how asureSIGN can help you implement a successful Requirements Driven Verification and Test Strategy by visiting asureSIGN or enter your details and we will be in touch.
Course Dates and Pricing
To receive additional information, including course dates and pricing, please contact our training team who will be happy to help.
Download Request
Please complete the following form then click 'submit' to access the download.
Presentation Request
Please complete the following form then click 'submit' to gain access to the presentations.
DOWNLOAD REQUEST
Please complete the following form and then click 'submit' to gain access to the download.
FREE QA ASSESSMENTS
Did you get what you were looking?

Let the testing experts help. We will run a FREE QA assessment which will include our top 5 recommendations to help maximise your testing.