Conference:DVCLUB Europe: Cache Verification (Feb 2017)
Speaker:Adnan Hamid (CEO), Breker Verification Systems, Inc.
Presentation Title:ARMv8 Cache Coherency Verification with TrekSoC Portable Stimulus Models
Abstract:Verification of cache coherency used to be purely the domain of CPU providers. In modern ARM-based system-on-chip (SoC) designs, coherency is now a system-level challenge.  Problems to solve include custom fabric/fabric configuration/memory controllers, exclusive/acquire/release mechanics, I/O coherent IP, System MMUs and IP virtualization, and page tables to exercise all of the above.

This talk describes a novel method for automatically generating self-checking test cases that intensely stress SoC-level cache coherency. With these pushbutton test cases, SoC verification teams can verify coherency without having to become experts. These test cases are portable across all verification platforms, from simulation to silicon.

  • Using graph-based portable stimulus models to capture cache coherency protocols
  • Importance of scheduling tasks and memory addresses to hit coherency scenarios
  • Vertical and horizontal reuse of portable stimulus models
Speaker Bio:Adnan Hamid is the founder and CEO of Breker Verification Systems, and inventor of its core technology. He has more than 25 years of experience in functional verification automation and is a pioneer in bringing to market the first commercially available solution for Portable Stimulus. Prior to Breker, Hamid managed AMD’s System Logic Division and led its verification group to create the first test case generator providing 100% coverage for an x86-class microprocessor. Hamid holds 12 patents in test case generation and synthesis. He received Bachelor of Science degrees in Electrical Engineering and Computer Science from Princeton University, and an MBA from the University of Texas at Austin.

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  • At the request of the speaker Presentation Slides will not be available post-event.
  • At the request of the speaker recording Slides will not be available post-event.