DVCLUB Europe – Sep 2017

Verifying Analog and Physical Designs

The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events.  Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.

Event At A Glance

  • Tuesday 12th Sept, 2017
  • Lunchtime Meeting – 11:30 to 14:00pm
  • Online, Bristol, Cambridge and Grenoble
  • FREE to attend In-Person or Online

Registration

Eventbrite - DVCLUB Europe - September 2017

Agenda (GMT)

11.30 Arrival and Networking
12.00 Welcome and Introduction
Mike Bartley, CEO and Founder, T&VS
12.05 IOT is IOMSLPT for Verification Engineers
Adam Sherer, Product Management Group Director, Cadence
12.30 Co-Simulation for Functional Equivalence Checking
– Divyeshkumar Dhanjibhai Vora, ARM,
12.55 Real Value Modeling for Improving the Verification Performance
– Mallikarjuna Reddy, Test and Verification Solutions
13.20 Closing Remarks
13.25 Networking

 Venues

  • Bristol:
    – Regus, 2430/2440 The Quadrant, Aztec West, Almondsbury, Bristol, BS32 4AQ.
  • Cambridge:
    ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ, UK
  • Grenoble:
    STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble, France
  • Remote Access