DVClub Europe – February 2018 : UVM War Stories

UVM War Stories

In this DVClub meeting our speakers will share their experiences adopting UVM (Universal Verification Methodology) and then open the floor for discussion followed by the usual networking opportunities.

The Universal Verification Methodology (UVM) is a standard to enable guaranteed development and reuse of verification environments and verification IP (VIP) throughout the electronics industry. The Accellera industry body provides both an API standard for UVM and a reference implementation. That reference implementation is a class library defined using the syntax and semantics of SystemVerilog (IEEE 1800).

Event Summary

  • Tuesday 6th February, 2018
  • Lunchtime Meeting – 11:30 to 14:00pm
  • Online, Bristol, Cambridge and Grenoble
  • FREE to attend In-Person or Online

Download the Presentations

To download each presentation please visit each talk and click on the presentation link at the bottom of each page.

Agenda (GMT)

11.30 Arrival and Networking
12.00 Welcome and Introduction
Mike Bartley, CEO and Founder, T&VS
12.05 Functional Coverage is Useless *
Greg Smith, Oracle
12.30 I Didn’t Know Constraints Could Do That!
John Dickol, Samsung Austin Research and Design Center
12.55 Coding High Performance UVM
Mark Peryer, Mentor, a Siemens business
13.20 Closing Remarks
13.30 Networking

* Provisional titles

Venue Details

  • Bristol: Almondsbury Interchange Hotel, Gloucester Road, Almondsbury, Bristol, BS32 4AA.
  • Cambridge: ARM, 110 Fulbourn Road, Cambridge, CB1 9NJ, UK
  • Grenoble: STMicroelectronics – Polygone Scientifique, 12 Rue Jules Horowitz, Grenoble, France
  • Remote Access

Registration

To register for this meeting please complete the form below or visit the Eventbrite Registration Page. Registration is FREE but space is often limited and so we encourage early registration.

About DVClub

The principal goal of each DVCLUB meeting is to have fun while helping build the European verification community through regular educational and networking events. Attendance at DVClub Europe meetings is free and is open to all non-service provider semiconductor professionals. Each meeting addresses a specific issue faced by the design and verification community and whatever your speciality provides an excellent opportunity for updating knowledge as well as share experiences, insights and issues with other members of the verification community.