Sundararajan A, Cadence2015-06-23T10:54:13+00:00
Name:Sundararajan AnanthaKrishnan
Designation:Principal Application Engineer, Cadence
Title:Multi-Core SoC Verification Challenges

Abstract:

Multicore architecture such as ARMv8 demands a totally new way of doing verification. We’ll discuss about the different challenges faced during verification of a Multi-core SoC environment and the proposed solutions to handle these challenges.

Key Points:

  • Challenges in Multi-Core SoC Verification
  • ARM v8 based SoC Verification plan
  • Possible solutions

Biography:

  • Sundararajan is a Principal Application Engineer working with Cadence Design Systems, Bangalore for last 5 years.
  • Have total 14 years of experience in Verification ranging from block level to IP level to Sub-system level to SoC level. Prior to Cadence design systems, I worked for Xilinx.

Presentation Material

  • At the request of the speaker the Presentation Slides & Recordings will not be available post-event