Julia Dushina-ST2014-07-23T11:34:51+00:00






Name:Julia Dushina
Designation:Verification Engineer
Title:Using Property Checking to find a difficult bug in DMA block: Industrial Experience

Abstract: This talk describes an experience of nailing a DMA bug in a production chip. Whilst debugging a problem in a set-top-box board, it was understood that a DMA did not function correctly and corrupted data during transfer from internal to system memory. Property checking was used to find the bug source in record time for such a problem.

Biography : Julia Dushina graduated from Tallinn Technical University in Estonia in 1990 and stayed there as a verification engineer. In 1995 she obtained her Master Degree in Computer Science from Institut National Polytechnique de Grenoble (INPG) in Grenoble, France. In 1999 she obtained her Philosophy Degree in Computer Science from Universite Joseph Fourier in Grenoble, France. Since then she has been working at STMicroelectronics in Bristol at various positions leading verification teams and techniques.

Formal Verification Seminar Presentation                  Video Presentation