RWTH Aachen University (ICE) 2016-03-30T05:41:59+00:00

 

 

 

 

Tool:  Easy Multicore Programming Using MAPS

Description:

An overview of various features of the MAPS framework, introduced at the Programming Workshop, will be presented.

Programming multicore platforms is a grand challenge for SoC providers and users today. As a result of a long-term R&D investment, ICE at RWTH Aachen University has developed the MAPS Compiler, a tool framework that eases programming of heterogeneous multicore architectures, while ensuring optimal system performance. Its input language is an easy-to-use C extension that models concurrent processes and applications as well as legacy code. Based on novel code analysis and profiling technologies, MAPS performs automated code partitioning as well as optimized spatial and temporal task to processor assignment. The output is partitioned C code that can be compiled by the native C compilers of the processing elements. By executing the code on a real or virtual target platform, the user can quickly evaluate the result quality and, if required, explore further software mapping options.

Over several years of R&D, MAPS has taken the step from basic research to a tool framework that enables programming of real-life complex multicore platforms. At the Multicore Challenge 2012 event, we will present the MAPS technology and tools in-depth. Together with a real-life multicore tablet demo, we will demonstrate how to parallelize and migrate your software to multicores easily and smoothly using MAPS.

Presenters:

Jeronimo Castrillon, Chief Engineer
Maximilian Odendahl, Research Assistant

Biography (Jeronimo Castrillon)

Jeronimo Castrillon received the electronics engineering degree from the Pontificia Bolivariana University in Colombia in 2004 and a master degree from the ALaRI Institute in Switzerland in 2006. Thereafter he joined the Institute for Communication Technologies and Embedded Systems (ICE) at the RWTH Aachen University, where he is working as a full time researcher while pursuing his PhD.  Since mid 2009, he is the chief engineer of the chair for Software for Systems on Silicon of the ICE institute.  His research interests lie on MPSoC programming: automatic code partitioning, code generation from abstract parallel programming models, compile time mapping and scheduling as well as HW/SW support for run-time systems.

Biography (Maximilian Odendahl)

Maximilian Odendahl received a diploma in computer engineering from RWTH Aachen in 2010. Thereafter, he joined the Institute for Communication Technologies and Embedded Systems (ICE) at the RWTH Aachen University as a full time researcher while pursuing his PhD. His research interest lies in automatic code generation from abstract parallel programming models, software mapping exploration as well as new algorithms for data mapping.

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