|Designation:||Senior Staff Engineer in Verification|
|Title:||10x Faster Regressions|
Abstract : Regressions always take far longer to complete than we would like. This presentation will take a look at the key areas that enabled us to make a 10x improvement in the regression turnaround time, for our CPU verification environment. The result being that a 200 test sanity check regression now takes 2 minutes. A 1200 test regression can be run before engineers commit changes in 10 minutes. The biggest gain, a 20k test ‘overnight’ regression will now complete within an hour, and it is now something that can be run multiple times each day.
Biography : Mark has been with Infineon for 13 years, during this time he has worked on the verification of 3rd party and in-house IP and CPUs. He has expertise in constrained-random verification environments, such as eVCs and ISGs, and flows. Most recently he has been responsible for the TriCore verification flow, ensuring that it’s maintainability, performance, ease-of-use and reporting are best in class. He has worked on making the CPU verification environment highly re-usable for deliveries of TriCore into both the Aurix and next generation families of microcontrollers. Prior to working at Infineon Mark worked at GEC Plessey Semiconductors (Mitel) on development of IP’s and SOC’s for the Set-top-box market. Mark has a BEng Electrical & Electronic Engineering from University of Bath.