Saravanan Mohanan, Microchip

Name: Saravanan Mohanan
Designation: Principal Engineer
Title: Generic ABCML channel scoreboard for reuse across MOST protocols

Abstract:  Generic ABCML scoreboard is used for horizontal and vertical reuse for different automotive chips.  Scoreboard is designed for horizontal reuse across interfaces like USB, PCIE, NI, MLB & RF. scoreboard works at the block level as well as the full chip level. Scoreboard has the capability to predict packet loss and DUT packet transformation and check the same. Scoreboard has the Transaction analysis port for communicating matched packets to companion scoreboard. Scoreboard has RTL transformation prediction mode to predict the expected packet transformation done by the DUT.

Biography:  Saravanan has been in the ASIC design and verification arena for over 13 years. He has worked for different companies like Broadcom, Qualcomm, Microchip, Synopsys & Atheros communication and is currently working in Microchip. He has worked on various stages of ASIC/FPGA life cycle starting from architecture, design, synthesis, emulation and verification. He has also worked extensively in HVL’S (VERA, NTB, system verilog) and methodology ( RVM,VMM,OVM & UVM ) which includes architecting verification environments for various protocols like USB2.0 ( device , hub & OTG), PCIE ( root complex ), Ethernet (GMII,TBI,TCP,UDP,ICMP,IPV4,fragmentation/ defragmentation), I2S, SPDIF, video ( uncompressed digital video) , nand flash, 802.11.* & processor using methodology like RVM,VMM,OVM & UVM. Saravanan is passionate about almost everything he does and believes in challenging the status quo and that’s really what drives him to excel. He is also the author of the blog the Art of verification ( )  – the blog is followed by verification engineers across the globe and listed in the VMM central site.

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