Vijay Gor, omniphy2014-05-29T10:46:51+00:00

Name:Vijay Gor
Designation:Verification Manager
Title:Analog Mixed-Signal (AMS) Verification Challenges

Abstract:  Talks about the need for AMS simulations and primary challenges faced during AMS Verification

Biography:  Holding M.S (VLSI-CAD) degree from Manipal University. Verification Engineer with expertise in IP/SOC level verification, Hardware Emulation and leading IP/SoC level verification projects.

Verification Futures Conference Presentation