Verification Futures Europe 2017

verification future 2017Now in its 7th successful year, VF2017 Europe is a unique one day conference, exhibition and industry networking event organised by T&VS in partnership with NMI to discuss the challenges faced in hardware and software verification with a focus on safety and security. The event gives the opportunity for end users to define their current and future verification challenges and collaborate with the vendors to create solutions. It’s also an excellent opportunity to network and catch up with other verification engineers across Europe.

Overview

When: Thursday, 6 April 2017
Where: Reading, UK – Holiday Inn, Wharfedale Road, Winnersh Triangle, Reading, RG41 5TS (M4 J10)

Registration

By registering for VF2017 you will guarantee your FREE delegate place, either in-person or online.

Eventbrite - Verification Futures Europe 2017

Agenda

08:30 Registration, Coffee and Networking
09:25 Welcome: Mike Bartley, Test and Verification Solutions Ltd.
09:30 Keynote Presentation:
SECT-AIR – A UK Initiative to Reduce Aerospace Software Cost
Rolls-Royce Control Systems, Mike Bennett
User Top Verification Challenges
10:00 Challenge 1: Qualcomm, Anantha Ramanand
10:10 Challenge 2: GE Aviation, Adam Skinner
10:20 Challenge 3: Thales UK, Simon Thomas
10:30 Automotive Safety and Security in a Verification Continuum Context
Synopsys, Jean-Marc Forey
11:00 Refreshments, Networking & Meet the Sponsors
11:30 Verification Solutions: Testbench Automation
Mentor Graphics, Adam Rose
Hardware Verification – Track 1 Software Testing – Track 2
11:50 Analytics-Driven Verification
ARM, Bryan Dickman
How a Model Based Design Improves Your Testing Strategy
ANSYS UK Ltd., Steven Blyth
12:10 Efficient Verification
Sequans Communications, Christopher Malkin
Agile Software Testing
T&VS, Michael Benjamin
12:30 RISC-V Processor Variants: Challenges and Strategies for Functional Verification
Codasip, Marcela Zachariasova
Intelligent Testing: Introducing Agency Into the Test Environment
University of Bristol, Kerstin Eder
12:50 Compiler Regression Testing as Pre-Silicon Hardware Validation
Embecosm, Jeremy Bennett
12:55 Lunch and Networking
13:50 Exploring How the Internet of Things is Changing the Verification Challenge
Cadence Design Systems, Nick Heaton
Safety – Track 3 Security – Track 4
14:20 Managing Functional Safety from the Top – The OEM’s Perspective
Jaguar Land Rover, Edith Holland
Security – The Enemy of Verification
Thales Security, Peter Davies
14:40 Knowing When Enough is Enough in the Verification of Safety Critical Systems
GE Aviation, Jon Wright
IoT Systems, Security and Verification
Chipless, Roger Shepherd
15:00 Automated Certification – from Soup to Nuts
D-RisQ Ltd., Nick Tudor
Finding Security Vulnerabilities by Fuzzing and Dynamic Code Analysis
MathEmbedded, Richard Storer
15:20 The Challenge of Verifying Highly Automated Automotive Systems
Horiba Mira Ltd., Helen Monkhouse
Cyber Security in the Internet of Things and Complex Cyber Physical Systems
University of Warwick, Hugh Boyes
15:40 Refreshments, Networking & Meet the Sponsors
16:10 RedisCovering Coverage: Indeed the Grass is Greener on the Other Side
OneSpin Solutions, Dr. Ashish Darbari
16:30 Keynote Presentation:
Safety and Security Considerations for Software and Digital Hardware Verification
University of Southampton, John Colley
17:00 Event Closes

What Are Your Top Verification Challenges?

We are undertaking a survey of the top challenges that users face in undertaking hardware and/or software verification and validation and your input would be invaluable. All responses are anonymous and the results will be presented at VF2017. There are just two questions and it should take less than 2 minutes to complete. Thank you.

Create your own user feedback survey

Agenda and timings subject to change.