Verification Productivity with Portable Stimulus 2018-04-04T09:36:47+00:00

Verification Futures 2018

Conference: Verification Futures 2018 (click here to see full programme)
Speaker: Nigel Elliott, Verification Applications Manager, ASIC/FPGA Design, Mentor, A Siemens Business
Presentation Title: Verification Productivity with Portable Stimulus
Abstract: It’s time to take the next step in Verification Productivity with Portable Stimulus. Designs continue to grow in size and complexity and it is no longer feasible to create separate tests in UVM, C or any other environment at each stage of your verification as you go from block- to system-level. Today’s verification entails running on different platforms, from virtual prototyping to simulation, emulation, FPGA prototyping and even silicon, each of which requires its own environment. The key to productivity is to reuse test intent seamlessly throughout the process with portable stimulus.
Key topics covered include:

  • Learn how Portable Stimulus lets you declaratively specify your verification intent
  • How to create abstract models the can be used to generate multiple scenarios from a single partial specification
  • How Portable Stimulus generates different platform-specific implementations of the scenarios throughout the verification cycle
Speaker Bio: Pending
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