A European Twist on DVCon

dvcon1
DVCon has been running in Silicon Valley since 1988 but is now going on the road, arriving in Munich, Germany on October 14th and 15th 2014, where it will receive a European makeover. In anticipation, I’ve talked to a number of key people involved to find out what the European slant on DVCon will be.

Accellera Systems Initiative is a sponsor of DVCon who provide design and verification standards including IP-XACT, SystemC, SystemVerilog, UPF, UCIS and UVM. This gives DVCon Europe a strong technical theme and thus a great place for engineers to network.

Stan Krolikoski of Cadence and past Chair of DVCon US likes the small intimate atmosphere of DVCon and explains, “Not everybody can come to Silicon Valley so we want to bring the DVCon to the users in Europe.”

Martin Barnasconi of NXP and General Chair of DVCon Europe explains, “The main theme is learning and sharing through a mix of tutorials, posters, papers and exhibits. DVCon Europe will have a very practical approach where application-specific problems are discussed.”

Oliver Bell of Intel Mobile Communications and DVCon Europe Vice Chair and Tutorial Chair gave a few specific topic examples: heterogeneous system level design, combining AMS [analogue mixed-signal] with hardware-software, and the system-of-systems that are typically part of the development of today’s highly complex electronics-based products.

As DVCon Europe Program Vice Chair I will also be speaking at the conference on
Requirements Driven Verification and Test. This technique is particularly useful for teams developing hardware and software to comply with standards such as ISO26262 for automotive, and DO178C/DO254 for avionics. However, I will show how RDVT can improve system development in general.  For more information on TVS at DVCon Europe, click here.

Hence, DVCon Europe will present a unique opportunity to network and learn from practicing design and verification engineers from across the community. The Accellera sponsored dinner will offer a further opportunity for networking with fellow engineers. Visit the DVCon Europe website to learn more and to register for the event.

2018-02-23T11:06:42+00:00 22nd September, 2014|Active Event, Events|
T&VS NEWSLETTER SIGN-UP
The T&VS newsletters inform you about industry news, events and information from T&VS. No spam, we promise and it is always easy to unsubscribe.
We never share your information. Read our Privacy Statement
Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
Bootcamp Enquiry Form
If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
FREE SystemC UVM Library Now Available
The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
Have your product requirements been successfully tested and implemented?
Find out how asureSIGN can help you implement a successful Requirements Driven Verification and Test Strategy by visiting asureSIGN or enter your details and we will be in touch.
Course Dates and Pricing
To receive additional information, including course dates and pricing, please contact our training team who will be happy to help.
Download Request
Please complete the following form then click 'submit' to access the download.
Presentation Request
Please complete the following form then click 'submit' to gain access to the presentations.
DOWNLOAD REQUEST
Please complete the following form and then click 'submit' to gain access to the download.
FREE QA ASSESSMENTS
Did you get what you were looking?

Let the testing experts help. We will run a FREE QA assessment which will include our top 5 recommendations to help maximise your testing.