As FPGAs become more complex it becomes harder to verify and debug them in the lab and so FPGA engineers are turning to more advanced verification techniques. These are the topic of Verification Futures – a unique free one day conference, exhibition and industry networking event organised by TVS to discuss the challenges faced in hardware verification.
The event is in its fifth year will be held in Reading on Feb 5th but remote access is also available.
Doug Amos of the NMI will kick off the FPGA track. Doug will present a thought-provoking summary of the key findings from the October 2014 NMI FPGA Usage survey, highlighting common challenges, skills, methods and trends.
The free event gives the opportunity for end users to define their current and future verification challenges and collaborate with the vendors to create solutions.