Janick Bergeron considers European Verification Challenges

We asked Janick Bergeron of Synopsys about the type of challenges Synopsys is currently seeing at user sites in Europe?

“Owing to Europe’s unique broad markets including automotive, communications, graphics, industrial and consumer SoC applications, the verification challenges are many and varied, and one size definitely does not fit all” replied Janick.

You can learn more about these challenges at Verification Futures /verification-futures

Janick added “However, recent developments for verifying very large SoC designs at leading edge process nodes are also applicable to designs in those other application spaces. These developments can only succeed after a large-scale R&D investment across many new technologies in partnership with industry leaders to accelerate innovation.”  Janick Bergeron.

Hear more from Janick about the solutions from Synopsys and other major EDA vendors at verification Futures.

2014-06-26T11:25:53+00:00 14th November, 2012|Events, Hardware Verification, Requirements|
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