In his forthcoming talk at DVClub Europe on Tuesday 1st December, Adiel Khan (Senior Staff Engineer, Verification Group Business Unit) at Synopsys will discuss using graph based portable stimulus in system level coverage closure.
“Coverage Closure” is the process used to reach 100% of your coverage goals. In a directed test methodology, it is simply the process of writing all of the test cases outlined in the verification plan.
For RTL-Code coverage this is ensuring all lines and conditions of code have been executed. In a constrained-random methodology, it is the process of adding constraints, defining scenarios or writing directed tests to hit the uncovered areas in your functional and structural coverage model. In the latter case, it is a process that is time-consuming and challenging: you must reverse-engineer the design and verification environment to determine why specific stimulus must be generated to hit those uncovered areas.
Something that is challenging and time-consuming is an ideal candidate for automation. In this case, the Holy Grail is the automation of the feedback loop between the coverage metrics and the required stimulus. The challenge in automating that loop is correlating those metrics with the input constraints, rather than leaving the engineer to draw out and hypothesize on possible ways to reach that coverage metric.
See the full agenda and registration details here
The principal goal of DVClub Europe is to have fun while helping build the verification community through regular educational and networking events. Attendance is free and can be in-person by attending one of three European venues or via remote access. Attendance is open to all non-service provider semiconductor professionals but registration is essential as these sessions are often over-subscribed. DVClub Europe is coordinated by TVS with the support from a number of sponsors.