SoC HW/SW Co-Verification Challenges

At DVClub Bangalore on 18th June, Sudhakar Surendran, Technical lead at Texas instruments will presenton “SoC HW/SW Co-Verification Challenges

In recognition of the fact that advent of programmable processors in SoCs have made HW/SW verification an essential part of SoC verification, Sudhakar will address challenges faced in:

  • Verification plan creation
  • Identifying scenarios for HW/SW verification
  • Usecase extraction and mapping to manageable verification items
  • Test case creation
  • Library creation/verification
  • Issues in automation and randomization
  • Testcase execution
  • Run time issues, design/TB optimizations
  • Emulation/Prototyping challenges
  • Debug
  • SW debug challenges
  • Isolating the HW problem
  • Coverage closure

Sudhakar is working as a Technical lead in MCU division at Texas Instruments, currently focusing on Analog integration. He has earlier worked on IP verification, SoCVerification, Emulation, Prototyping, Silicon Validation and Leading teams.Sudhakar has six publications and three patents on verification and micro-architecture.He holds MSc degree from IISc, Bangalore and BE from PSG College of Technology, Coimbatore.

Attending the DVClub conference on June 18 is free but places are limited so we recommend early registration. You can register here