Gabriel Chidolue, Verification Technologist at Mentor Graphics, discusses “A Methodology for Incremental Specification of Power Intent using UPF” at DVClub Europe on 22 September 2015.
Gabriel presentation will cover how to use the UPF Successive Refinement methodology in detail, how it can accelerate design and verification with a re-usable IP to System flow, and simplify the debugging of complex power management architectures.
He will illustrate these advantages by applying the methodology to an ARM® IP-based system design.
If you want to find out more about Power Intent using UPF, then join us on the 22nd Sept.
You can attend physically at UWE( in Bristol, Cambridge, Grenoble and Sophia ) or remotely and you can find out more about the conference and how to register here