SystemC-based UVM verification infrastructure

BluWireless designs use SystemC and so it was a natural choice to also select SystemC for the test bench language. However, they also wanted to follow current industry best practise with a UVM-compliant verification strategy. In this talk at Verification Futures Andy Lunness  of BluWireless will outline the development of a SystemC testbench that is UVM compliant with a TLM 2.0 interface.

Learn more here.