Tackling the European challenges in verification

EETimes Europe asked Mike Bartley of leading verification house TVS to look at how European companies see the challenges and possible solutions. Read the article here.

The major silicon companies inEuropesee the rise in design complexity as a major verification challenge but see different methods of solving this.

These topics are covered at the Verification Futures conference held in UK, France and Germany during the week of November 19th 2012

2014-06-26T10:37:09+00:00 18th August, 2012|Events, Hardware Verification|
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