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Using FPGAs to accelerate verification of your next ASIC: Introducing the FPGA Co-emulator

Alex Grove, Product Specialist at FirstEDA, presented on how to use FPGAs to accelerate verification of next ASIC by introducing the FPGA Co-emulator at Verification Futures Conference  “Challenges faced in Hardware Verification” on 4 Feb 2016.

Find out the Presentation Slides and Recordings here

2016-02-23T06:10:42+00:0023rd February, 2016|Active Event, Blog, Events|