Verification Futures India 13th May 2014

Verification Futures, returning to Bangalore on 13th May 2014, is a one-stop-shop that offers you the opportunity to network with Verification specialists and all of the major verification EDA vendors in the same venue.

Venue: Hotel Park Plaza, 90-4 Marathahalli/Outer Ring Road, Bangalore, Karnataka – 560037

Verification specialists from a number of product companies will share their top Verification challenges. In the past three years of Verification Futures, we have seen over 70 challenges from more than 20 presenters . There will also be papers from users from who have solved their own challenges. This time, we already have more than 200 confirmed participants with speakers presenting on diverse topics like Hybrid Simulation, AMS Verification Challenges and Generic ABCML Channel Scoreboard. Many of the top EDA vendors are also expected to be in attendance.

If you are a Verification professional, this a unique opportunity to acquaint yourself with current verification challenges and how others are solving them. Book now!  The conference sold out in 2013 and we had to disappoint those who didn’t register early. Don’t forget that the conference is also available by remote access for those who can’t attend!

2015-01-19T13:31:43+00:00 18th March, 2014|Hardware Verification, TVS-India|
The T&VS newsletters inform you about industry news, events and information from T&VS. No spam, we promise and it is always easy to unsubscribe.
We never share your information. Read our Privacy Statement
Interested in Formal Verification?
Then why not attend the TVS Formal
Verification Bootcamp training?
The 2-day Formal Verification Bootcamp is for design and verification engineers looking to enhance their knowledge of formal verification and to learn how to write effective assertions to find and fix bugs. The course is a mix of presentations and hands-on development exercises.
Bootcamp Enquiry Form
If you are interested in receiving additional information on the course then simply email Mike Bartley (TVS CEO and Course Leader) by entering your details below.
Interested in SystemC?
FREE SystemC UVM Library Now Available
The TVS SystemC UVM library closely mimics UVM but gives users a license free UVM-based verification environment.
Have your product requirements been successfully tested and implemented?
Find out how asureSIGN can help you implement a successful Requirements Driven Verification and Test Strategy by visiting asureSIGN or enter your details and we will be in touch.
Course Dates and Pricing
To receive additional information, including course dates and pricing, please contact our training team who will be happy to help.
Download Request
Please complete the following form then click 'submit' to access the download.
Presentation Request
Please complete the following form then click 'submit' to gain access to the presentations.
Please complete the following form and then click 'submit' to gain access to the download.
Did you get what you were looking?

Let the testing experts help. We will run a FREE QA assessment which will include our top 5 recommendations to help maximise your testing.