Design for Testability (DFT)

Continuously shrinking process nodes have introduced new and complex on-chip variation effects creating new yield challenges.  Combined with ever-increasing design complexity with multiple memories, mixed signal blocks and IPs from multiple vendors crammed into a single SoC, Design for Testability (DFT) implementation and Production Test signoff has become a major challenge.  The T&VS asureDFT services suite helps you to overcome these challenges by establishing a DFT strategy that delivers improved DFT execution quality and reduced time-to market.

asureDFT Portfolio

DFT Services

  • Implementing Scan ( Compression/ non-compression ) implementation with industry standard tools
  • ATPG (stuck-at, at-speed, SDD, Path delay, new faults based on the technology and strategy) vector generation, Covergae analysis, Pattern (verilog, wgl) simulation (Gate Level Simulations (unit-delay, extracted dealy with sdf)
  • Memory BIST implementation, Simulation & Vector preparation for good simulation and repair flow with fault Injections with industry standard EDA tools
  • Experienced professionals can support on the in-house tool based implementation/verification for our customers.
  • Logic BIST
  • IEEE 1149.1, IEEE1149.6 compliance test controllers (JTAG)
  • Ensuring the design integrity on pre and post DFT by Formal Verification
  • ATE support on pattern stabilization, split lot analysis / Diagnosis of Structural (scan, mbist) failures

DFT Training

  • DFT Strategy/Structural Testing with testmode STA needs
  • Exclusive trainings on JTAG, BSCAN, SCAN, MBIST
  • Customized contents for customer requirements

Off-the-shelf DFT components

  • JTAG TAP based test controllers and verification frame works (JTAG, IEEE 1149, TAP and its customized Instructions)
  • Test suites for Verifying BSCAN and generating tests for DC parametric tests (No dependencies with EDA Tool)
  • Generating Tester compatible vectors for Post Si validation (ATE)
  • Format conversions with ATE logs for diagnosis

DFT Methodology Services

  • Development of DFT methodology
  • Assessment of existing DFT methodology


  • Reduced overhead due to trained skills being available – No need to hire expensive DFT resources
  • End-to-end support – From design to silicon
  • Off the shelf components – Reduce DFT turnaround times
  • Training support – Bridge the gap in experience levels; Remote support from T&VS office to resources at customer sites

Find Out More

For more information on our asureDFT services or to discuss your requirements in
more detail, please contact us.

Alternatively call one of our local sales offices.