The MIPI C-PHY VIP is a highly flexible and configurable verification IP that can be easily integrated into any SOC verification environment. Supporting UVM, this C-PHY VIP is part of the asureVIP portfolio of implementation-proven VIP offerings.
This UVM VIP has extensive constrained random stimuli generation capabilities, configurable monitors and checks to ensure protocol compliance to MIPI standard for C-PHY specification 1.0. Pre-defined coverage bins enable easier extension and coverage collection. The VIP has been verified for protocol compliance using asureSIGN, T&VS’ in-house Requirements tracking tool.
Customers using the asureVIP products do so with the confidence of knowing that they have been independently developed by T&VS and successfully deployed by leading SoC companies around the world.
T&VS can also offer asureVIP customers an independent hardware verification service (asureVERIF) that not only reduces development costs and time-to-to-market, but also improves product quality.
- VIP: MIPI C-PHY
- Compliance: MIPI 1.0 Specification
- Language: System Verilog
- Methodology: UVM 1.1
- Simulators: Cadence Incisive, Mentor Questa
MIPI C-PHY VIP Deliverables
- MIPI C-PHY VIP
- Sample Testbench
- Sample Virtual Sequencer
- Sample Scoreboard
- VIP User Guide
The MIPI C-PHY VIP supports:
- Transmission error generation and detection
- Detection of all timeouts
- Injection of various timeout errors
- Parallel Peripheral Interface (PPI)
- Short and long packets
- High-speed and low-power packet transmission and reception
- Uni- and bi-directional communication
- asureVIP MIPI C-PHY VIP Datasheet
Find out more
For more information or to discuss you requirements, please Contact Us.
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