Understanding ASIC Development

Developing an ASIC or a SoC and going into production require various competences. As a result, it is necessary to ensure that the ASIC design and development process is undertaken in a logical and controlled manner. Each stage of the ASIC design and development process should be carefully monitored, and precautions taken to ensure that [...]

2017-11-03T04:00:29+00:003rd November, 2017|Blog, Thought Leadership|

Improving ASIC Design Verification using FPGAs and Structured ASICs

Prototyping an ASIC or SoC design using FPGAs can relieve the time bottleneck and remove the high calibre compute resources required to verify the functionality of medium-to-large sized designs. This article from Design Reuse describes the benefits of using FPGAs and structured ASICs to improve verification of ASIC or SoC designs in less time, thereby [...]

2017-08-16T06:39:33+00:0016th August, 2017|Blog, Thought Leadership|

ASIC Verification: Build or Simulate?

Managing verification for ASICs requires a well-defined verification plan. Efficient verification planning starts with functional and design requirements in which requirements are mapped to verification methods, scenarios, and coverage groups. This article from Any Silicon describes the recommended verification approaches in building or simulating the ASIC verification by defining their advantages and issues. Read More

2017-04-13T08:54:22+00:0013th April, 2017|Blog, Thought Leadership|