Leveraging HLS/HLV flow for ASIC Design productivity

High-level Synthesis is an automated design process that lets hardware architects to build and verify hardware efficiently.  This article from SemiWiki describes how HLS/HLV methodology works efficiently at a higher level (C/C++/SystemC) and complements the RTL flow for ASIC design productivity. Read More Learn more about T&VS SystemC model for the Advanced Memory Subsystem

2016-01-21T06:03:38+00:00 21st January, 2016|Blog, Thought Leadership|

A Prototyping with FPGA approach

Frank Schirrmeister, Group Director for Product Marketing at Cadence,explores the benefits of using FPGAs for ASIC Prototyping with the help of two abstraction levels (Transaction-level models (TLM) and Register transfer models (RTL)) and the factors that limit the growth of FPGA based prototyping. Read More

2015-08-17T05:34:32+00:00 17th August, 2015|Blog, Thought Leadership|

ASIC Implementation of a Speech Detector IP-Core for Real-Time Speaker Verification

This article from Design and Reuse presents an IP core speech detector for real-time systems, focusing on identification of segments of silence or voice, used in pre-processing of input signals to Speaker Recognition and Verification Systems. The IP-core was designed to be able to be adapted to different environments of use and based on energy [...]

2015-04-10T04:58:06+00:00 10th April, 2015|Blog, Thought Leadership|

TVS’ partnership with ELECTRA IC strengthens Turkish presence

PRESS RELEASE Bristol, UK, 24 November, 2014 – TVS, a leader in software test and hardware verification solutions, today announced its business partnership with ELECTRA IC. The Istanbul, Turkish-based design and verification services company has excellent synergy with TVS and the partnership creates opportunities for both companies to leverage their combined expertise to win and [...]

2018-02-16T11:33:31+00:00 24th November, 2014|Press Releases, Thought Leadership|

TVS extends products and services into China in partnership with TopBrain Design Systems

PRESS RELEASE Bristol, UK, 8 July, 2014 – TVS, a leader in software test and hardware verification solutions, today announced it is continuing its international expansion through a partnership with TopBrain Design Systems. TopBrain is an advanced verification solutions provider for complex electronics design organisations and this partnership announcement formalises TopBrain as the official partner [...]

2016-10-25T05:53:02+00:00 8th July, 2014|Press Releases, Thought Leadership|
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