Tag Archives: design for testability

T&VS adds Design for Testability to services portfolio, enabling customers to reduce time to market

PRESS RELEASE

Bristol, UK, 29 January 2015 – T&VS, a leader in software test and hardware verification solutions, today announced a strategic expansion of its services with the addition of a new Design for Testability (DFT) business arm – asureDFTTM.

asureDFT extends T&VS’s expertise in test and verification into the DFT domain where ever-increasing design complexity combined with complex on-chip variation effects at lower process modes have introduced unique challenges for achieving first-pass silicon success. To attain desired yield levels, it has become imperative to invest additional time and effort in developing custom DFT strategies. T&VS’s asureDFT services suite addresses this need by helping clients design and implement a DFT strategy that delivers improved execution, quality and reduced time-to market.

“asureDFT is a natural extension of T&VS’s core expertise in the hardware verification domain,” said Mike Bartley, T&VS founder and CEO. “T&VS can deliver end-to-end DFT support – from design all the way up to silicon. For organizations looking to develop a DFT methodology, T&VS can help reduce project overheads by eliminating the need to hire costly DFT resources. For organizations that already have a DFT architecture in place, T&VS can provide an assessment and suggest improvements to the existing methodology.”

The T&VS asureDFT services suite includes Scan, ATPG, Memory BIST (MBIST), Logic BIST (LBIST), JTAG, Formal Verification and ATE support. These are augmented by training support for DFT strategy/structural testing, together with exclusive training for JTAG, Scan, Boundary Scan and MBIST. T&VS can also provide off-the-shelf components for JTAG TAP based test controllers, test suites for verifying BSCAN, generate tester compatible vectors for ATE and format conversions with ATE logs for diagnosis.

“asureDFT is a one-stop shop for a wide range of DFT solutions encompassing services, training, off-the-shelf components and DFT methodology development and assessment”, concluded Mike Bartley, T&VS founder and CEO.

Detailed information on T&VS’s asureDFT services can be found at www.testandverification.com/solutions/structural-testing/.

Further information on T&VS’s products and services is available at www.testandverification.com.

About T&VS
T&VS (Test and Verification Solutions Ltd) provides services and products to organisations developing complex products in the microelectronics and embedded systems industries. Such organisations use T&VS to verify their hardware and software products, employ industry best practice and manage peaks in development and testing programmes. T&VS’ embedded software testing services includes onsite/offshore testing support including assistance with safety certification and security testing. T&VS hardware verification services include onsite/offshore verification support and training in advanced verification methodologies. T&VS also offers Verification IPs and its own Verification (EDA) signoff tool.

T&VS Company Contact
Dr. Mike Bartley – T&VS
+44 7796 307958
[email protected]

Media Contact
Oliver Davies – Publitek Technology PR
+44 1225 470000
[email protected]