Clock Domain Crossing in FPGA

Clock Domain Crossing (CDC) is a common occurrence in a multiple clock design. In the FPGA space, the number of interacting asynchronous clock domains has increased dramatically. It is normal to have not hundreds, but over a thousand clock domains. This article from Semiwiki highlights why CDC is a lingering issue, what its impact and [...]

2018-03-21T03:30:13+00:00 21st March, 2018|Blog, Thought Leadership|

Embedded FPGA: Increasing Security in Next-Gen Networks

FPGAs combine the programmability of processors with the performance of custom hardware. As they become more common in critical embedded systems, new techniques are necessary to manage security in FPGA designs.With the increasing use of FPGAs in many embedded applications, the failure to protect FPGA-based embedded systems from cloning attacks has brought serious losses to [...]

2018-03-14T07:01:25+00:00 14th March, 2018|Blog, Thought Leadership|

The Hierarchical architecture of an embedded FPGA

The most powerful approach to managing the complexity of current SoC hardware is the identification of hierarchical instances with which to assemble the design. The development of the hierarchical design representation requires judicious assessment of the component definitions. This article from Semiwiki highlights the typical hierarchical architecture of an embedded FPGA. Read More Check out T&VS services [...]

2018-03-08T10:01:48+00:00 8th March, 2018|Blog, Thought Leadership|

Dipping in the Hardware Emulation Archives

From its FPGA-based beginnings to today’s advanced architectures used by a select group of companies, emulation has changed dramatically over the past three decades. This article from Electronic Design highlights how the hardware emulation archives for its remarkable journey. Read More Find out how T&VS Hardware Emulation services allow verifying the robustness of a design [...]

2018-02-23T06:12:48+00:00 23rd February, 2018|Blog, Thought Leadership|

Moving from FPGA’s to Embedded FPGA Fabric – How it’s Done

The recent explosion of FPGA-based compute acceleration has created an enormous new market opportunity for programmable logic. At the same time, however, eFPGAs represent a serious challenge to FPGAs in capturing the long, big-money tail of the compute acceleration wave. eFPGAs are IP blocks that can be used by custom chip designers to add FPGA [...]

2018-02-02T05:36:00+00:00 2nd February, 2018|Blog, Thought Leadership|

Guide to Understanding FPGA Development

An FPGA is an integrated circuit or device that is programmed to perform specific functions after it has been built. The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an ASIC. This article provides you the knowledge needed to build a good FPGA foundation. Read More Check out T&VS services [...]

2018-01-31T06:14:08+00:00 31st January, 2018|Blog, Thought Leadership|

Now is the time for eFPGA technology

An embedded FPGA, to be useful for a wide range of chips, needs to be designed and optimized differently than an FPGA chip.  This article from Embedded Computing highlights why is it suddenly getting so much attention and describes the benefits, implementation considerations and future of eFPGA technology. Read More Check out T&VS services that [...]

2018-01-25T05:50:21+00:00 25th January, 2018|Blog, Thought Leadership|

Enhancing FPGA Prototype Debug

FPGA prototyping has always been the fastest and most cost-effective solution for verifying small designs late in the flow. Now, FPGA prototyping can be used throughout the process to find design bugs earlier, quickening the pace to software development.  This article highlights why the increased capacity, scalability, and debug solutions have made FPGA prototyping the [...]

2017-12-20T06:57:34+00:00 20th December, 2017|Blog, Thought Leadership|

Prototyping Partitioning Problems

Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This article from Semiengineering explores how to overcome the partitioning challenges in FPGA prototyping and outlines why there is still a big gap though FPGAs are [...]

2017-12-05T09:47:55+00:00 5th December, 2017|Blog, Thought Leadership|

The Case for Combining CPUs With FPGA Fabrics

Given that the industry is beginning to reach the limits of what can physically and economically be achieved is no longer achieving the same result it once did. Instead the industry is, quite rightly, focusing on new system architectures and making better use of available silicon through radical rethinking of how tasks are achieved within [...]

2017-11-30T07:04:03+00:00 30th November, 2017|Blog, Thought Leadership|
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