Verifying clock domain crossings in UPF-based low-power SoCs

Many digital IC designs use a universal clock signal to synchronize their operation, ensuring that the state of a changing logic signal is only sampled once it has settled to its new value.This article explains the verification challenges of using low-power design techniques to enable advanced power-management strategies in complex SoCs. Read More Find out [...]

2018-12-12T10:06:40+00:0012th December, 2018|Blog, Thought Leadership|

Integrated Data Management Crucial for AMS IC Design

Data management within big teams working on largeĀ digitalĀ IC designs is fairly entrenched and well understood. Teams are formed based on designer expertise and they are all familiar with the EDA design flow and tools and how to manage design files within those flows. This article explains how crucial is integrated data management for AMS IC [...]

2018-12-07T08:01:01+00:007th December, 2018|Blog, Thought Leadership|

A Simple Way to Improve Automotive In-System Test

The remarkable growth in automotive IC design has prompted a focus on ISO26262 functional safety compliance, which includes both high-quality manufacturing test and a minimum stuck-at test coverage of 90% for in-system test. This article explores what is hybrid ATPG/LBIST, how do hybrid ATPG/LBIST test points work and describes the way to improve automotive in-system [...]

2018-02-14T04:33:54+00:0014th February, 2018|Blog, Thought Leadership|