Running physical verification is critical in each stage of a design flow, and it requires a complete design database to ensure a valid run. ‘Complete’ means the design database includes the most up-to-date intellectual property (IP) design data merged with the top-level reference design data, and a fill database merged with the design database. This [...]
At the Cadence booth, Realtek Semiconductor showed off an “always-on, always-listening” controller for mobile devices leveraging a Cadence Tensilica HiFi DSP. Using Tensilica HiFi Cores with Realtek’s ALC5511/12 controllers to transform voice –trigger technology . Read more.
In the modern SoC era, verification is no longer a post-design activity. The verification strategy must be planned much earlier in the design cycle; otherwise the verification closure can become a never ending problem. Moreover, verification which appears to be complete may actually be incomplete because of undetected issues which can resurface during tape-out or [...]