Tag Archives: Portable Stimulus

Developing Tests in Reverse with Portable Stimulus

Whether developing tests for software or hardware, test development seems to follow a pretty predictable process. Portable Stimulus brings some very powerful features to the table in raising the level of abstraction at which test intent can be captured. Because the description is declarative, a PSS description is very easy to reuse, shape, and customize without changing the fundamental description. This article from Mentor Graphics explores how to develop tests in reverse using portable stimulus. Read More


Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Getting Generic with Test Intent: Separating Test Intent from Design Details with Portable Stimulus

It’s typical to think about writing tests for a specific design. However, as the number of SoCs and SoC variants that a verification team is responsible for grows, creating tests that are specific to the design is becoming impractical. The emerging Accellera Portable Stimulus Standard (PSS) provides features that enable test writers to maintain a strong separation between test intent and the design-specific tests that are run against a specific design.

This article shows how Accellera PSS can be used to develop generic test intent for generating memory traffic in an SoC, and how that generic test intent is targeted to a specific design.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Portable Stimulus in high-level synthesis flow

This article from EDN describes how Portable stimulus solutions help bring advanced verification capabilities to a C-based high-level verification environment and highlights a methodology where, a stimulus model can be defined (and refined) to help reach 100% code coverage of the C++ HLS DUT, and then reused in a SystemVerilog or UVM testbench with the synthesized RTL.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Solution = Standard + Tool

Solutions are what users need and the existence of a standard gives them the assurance that models they create will be portable between tools. This article from EDA Café explores how the portable stimulus standard creates a level playing field on which vendors can create tools that provide solutions.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

How to automate test from IP to SoC levels using portable stimulus

Portable stimulus seeks to raise the level of abstraction and enable the automated test of complex scenarios that emerge in subsystem- and SoC-level verification. This article highlights the role of portable stimulus at the block level and describes how portable stimulus can be used to automate test from IP to SoC levels.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Developing the Portable Stimulus Standard

The purpose for the portable test & stimulus standard is productivity and quality. It is essential to make designers, and especially verification engineers, more productive and increase the quality of their work. This article explores how does the portable stimulus working group achieve these goals and captures the conversation between industry experts on how to develop portable stimulus standard.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Getting A Standard Right, The First Time

Portable Stimulus Standard(PSS)is the first standard that increases the abstraction of the verification process and at the same time redefines verification correctly. The industry needs its luminaries to get involved in this standard and time is running out. If the right standard is not put in place, the whole industry will pay the price for it over the next couple of decades.

This article from Semiengineering summarizes the pros and cons of portable stimulus standard and outlines the biggest impact of PSS in today’s market.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Portable Stimulus Modelling in a High-Level Synthesis User’s Verification Flow

Portable Stimulus has become quite the buzz-word in the verification community in the last years, but like most ‘new’ concepts it has evolved from some already established tools and methodologies. This article from Mentor Graphics describes a methodology where, a stimulus model can be defined (and refined) to help reach 100% code coverage of the C++ HLS DUT, and then reused in a SystemVerilog or UVM testbench with the synthesized RTL.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Understanding Portable Stimulus Graphs

Today, when the EDA vendors talk about the Portable Stimulus Standard (“PSS”) they throw around the term “graph based” as if that somehow clarifies everything. They usually don’t bother to describe what it means, beyond it being some simple mathematical model.

Some vendors even confuse it with the term “graphical”.To simplify this confusion, this article from EDA Café explores how PSS relates to graphs and how those graphs relate to other similar graph-based models already used within the industry.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.

Portable Stimulus Gains Momentum

Portable Stimulus has become quite the buzz-word in the verification community in the last years, but like most ‘new’ concepts it has evolved from some already established tools and methodologies. This article from EDA Cade highlights the scope of the impact that portable stimulus has on the semiconductor industry.

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Find out how T&VS portable stimulus specification addresses today industry verification challenges.