This article from Semiengineering outlines why with the upcoming portable stimulus standard we need to consider whether abstraction is really the answer to everything. Read More Learn how T&VS describes the various areas of advancements required in functional verification for the future years.
This article from Semiengineering describes the concepts such as sequence, sequencer, driver and how the communication takes place from sequence to sequencer and from sequencer to driver and outlineshow it interacts with class uvm_sequence to generate stimulus out of sequence_item. Read More Join T&VS UVM training and learn how to improve the verification accuracy and [...]
The RISC-V instruction-set architecture, which started as a UC Berkeley project to improve energy efficiency, is gaining steam across the industry.While it’s simple to view RISC-V in terms of what is already available in the market today, the architecture opens new options in markets that are either still immature, or which are just starting to [...]