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Video: Tapping Into UVM-ML to Support Reuse in Multi-Language Verification Environments

CDNLive EMEA 2014 brought together a record number of Cadence technology users, developers, and industry experts to network, share best practices on critical design & verification issues, and discover new techniques for realizing advanced silicon, SoCs, and systems. At the event, Mike Bartley, CEO and Founder of TVS presented an informative session on using UVM-ML [...]

2018-02-23T11:09:26+00:0016th September, 2014|Events, Hardware Verification, Thought Leadership|