Tag Archives: UVM Verification

A SystemC-based UVM Verification infrastructure

TVS recently completed a SystemC-based Universal Verification Methodology (UVM) project for Blu Wireless Technology, a UK-based company that develops silicon-proven mmWave wireless baseband IP for advanced WiGig applications.

Blu Wireless follows a SystemC-based design flow. Following an initial specification period, it was quickly agreed that the best approach would be to deploy a SystemC test bench that would be UVM-compliant with a TLM-2.0 interface.

This EDN network blog outlines the infrastructure that was developed and the deployment of that infrastructure to enact the constraint-based random verification.

Read more.