A Portable Stimulus Public Service Announcement

A portable stimulus tool can do most of the work in verification and allows many tests to be created based on the defined verification objectives. This tool can be used to identify the gaps in the verification process and fill in those blanks. Portable Stimulus enables to quickly and easily specify scenarios that should be [...]

2018-09-20T06:36:05+00:0020th September, 2018|Blog, Thought Leadership|

Inside Portable Stimulus: Filling in the Blanks

A portable stimulus tool can do most of the work in verification and allows many tests to be created based on the defined verification objectives. This tool can be used to identify the gaps in the verification process and fill in those blanks. Portable Stimulus enables to quickly and easily specify scenarios that should be [...]

2018-09-14T10:04:47+00:0014th September, 2018|Blog, Thought Leadership|

Using More Verification Cores

Parallelization became important when the benefits of processor scaling started decreasing. The software industry took a very long time to learn how to use multiple cores successfully. Within the EDA industry, engineers have developed debuggers that are intended for highly parallel hardware. They have created a lot of knowledge within the industry about how to [...]

2018-09-13T08:36:36+00:0013th September, 2018|Blog, Thought Leadership|

Bugs That Kill

The main goal for verification is to run zero simulation cycles. The industry has been working on ways to make formal more approachable. One method is to create waveform since this aligns with the designers’ perspective.Formal verification is mainly used to close the last gap which was not found in a simulation cycle. But there [...]

2018-09-11T10:53:50+00:0011th September, 2018|Blog, Thought Leadership|

Portable Stimulus Modeling in a High-Level Synthesis User’s Verification Flow

In the last few years, portable stimulus (PSS) has gained attraction in the verification community. PSS is a verification methodology which is evolved from some of the existing tools and methods. Many users have been looking for various ways to describe PSS and also are trying many ways to expand the number of verification scenarios [...]

2018-09-07T06:23:54+00:007th September, 2018|Blog, Thought Leadership|

Gaps In Verification Metrics

As design complexity has increased, the verification effort has also grown exponentially, with many different types of verification being applied to different classes of design.The existing verification metrics are not showing any relevant results. It becomes more and more difficult when the design becomes complicated. This article from semiengineering is a discussion on design health [...]

2018-09-06T07:44:00+00:006th September, 2018|Blog, Thought Leadership|

Verification engineers embrace emulation for the shift left

There are some ways that can make verification more efficient and bring technologies such as formal, emulation, and simulation together. Formal verification can be used to check entire sub-systems such as serial controllers and identify all the parts. Formal apps can also be used to perform protocol checks and formal register verification. This formal coverage [...]

2018-09-05T09:29:07+00:005th September, 2018|Blog, Thought Leadership|

Is Software Necessary?

When it comes to system level verification, the relationship between hardware and software is not that good. Hardware is capable of running any software when the chips were simple. But now it is an impossible verification task for SoCs which contains deeply embedded processors. When verification targets such as power are added, it becomes a lot more [...]

2018-09-04T09:50:14+00:004th September, 2018|Blog, Thought Leadership|

Verification Trends Enabling A 5G Future

5G Wireless Technology will be crucial not only in the communication space but also in our daily lives. 5G devices and networks will become ubiquitous, supporting a faster wireless eco-system. One major challenge in the development and operation of telecommunication environments is the verification of network and device capabilities against multiple possible execution platforms. T&VS [...]

2018-09-03T07:48:56+00:003rd September, 2018|Blog, Thought Leadership|

Managing waivers in reliability verification

Reliability verification solutions help designers find and debug issues such as electrostatic discharge (ESD), multi-power domain crossing checks, voltage-aware design rule checking (DRC), and company-defined best practices. While debugging error results, a designer or an engineer may encounter conditions that validate waiving certain violations. Advanced reliability verification solutions should include an automated waiver management functionality which [...]

2018-08-31T08:21:37+00:0031st August, 2018|Blog, Thought Leadership|